How to choose system interface for digital tempera

2022-08-09
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How to select system interfaces for digital temperature sensors

thermistors, thermocouples, analog silicon temperature sensors and nickel/platinum resistance temperature detectors (RTDS) requires calibration to achieve the required temperature accuracy. As a mixed signal device, the digital temperature sensor does not need to be calibrated. They have integrated digital logic, and the working temperature range is -55 ℃ to 50 ℃. The absolute temperature ratio (PTAT) circuit is used to measure the local/remote temperature by detecting the change of the base emitter voltage (VBE) of the diode. It has simple integrated hardware to save the temperature value and program the temperature set point, device working mode, sleep mode and fast/slow conversion rate. Data is communicated through the inter IC bus (I2C bus) under the same cutting parameters, system management bus (SMBus) or serial peripheral interface (SPI). In fact, each device will be adjusted during production. The temperature detection accuracy is within ± 0.5 ℃ or higher, and the cost performance and reliability are very high. These advantages make digital temperature sensors popular in almost any imaginable applications, including PC, communication equipment, handheld devices and industrial control equipment

specifically, the main components of the digital temperature sensor include a dual current source and a Δ-Σ A/d converter, digital logic and a serial interface (such as I2C bus, SMBus or SPI) to digital devices (such as connecting to a microprocessor or microcontroller). There are two kinds of digital temperature sensors: local or remote temperature sensors. Both of them use some method to force two proportional currents through an NPN or PNP transistor connected in the form of a diode. Both of them are used to measure the VBE changes caused by using Δ-Σ The a/d converter samples the voltage and converts the value into a digital format. The forced current generally adopts a ratio of about 10:1. By forcing the proportional current and measuring the difference between two vbes, the first-order effect of is on the diode, which is a process related parameter, can be eliminated

each temperature sensor will be adjusted during production to match the ideal parameters of the diode to be used. The characteristics of the remote diode are taken from 2n3904/6. Since the local temperature needs to establish and improve the comprehensive evaluation criteria and industry standard of plastic granulator equipment, the sensor is only a simple NPN or PNP structure on the silicon substrate, and the remote temperature sensor is almost always integrated with a local temperature sensor. Therefore, the function of remote sensors is almost always the same as that of two sensors. The local temperature sensor incorporates a thermal diode in the same package. For local sensors, the thermal time constant (i.e. the time required to reach 63.2% of the final temperature) is a few minutes, depending on the package and the local diode located on the IC substrate. The bus load is too heavy or the conversion is too fast, which will cause the device to heat itself and affect the temperature accuracy

The time required for the temperature data to become available is called the conversion rate. The rate is determined by the internal oscillator and a/d resolution of the device, which is generally lower than 100Hz or longer than 10ms. The faster the conversion rate is, the faster the temperature data can be retrieved, and the more power the temperature sensor consumes. Due to the self heating effect, the conversion rate is usually low. Figure 1 shows a simplified block diagram of a remote temperature sensor and/or a local temperature sensor

Figure 1: simplified block diagram of digital temperature sensor

advantages of I2C bus or SMBus temperature sensor

the most popular digital temperature sensors are those with serial bus interface. The choice of temperature sensor bus depends largely on the available interfaces on the selected microprocessor or controller. The choice of controller depends on the experience of the engineer. For system data that requires frequent data stream transmission, SP experimental machine is the first choice because it has a fast clock rate, which can range from a few megahertz to tens of megahertz. However, for system management activities, such as reading temperature sensors and querying the status of multiple slave devices, or requiring multiple master devices to coexist on the same system bus (which is often required by system redundancy), or for low-power applications, I2C or SMBus will be the preferred interface. The following sections will introduce each serial bus and its advantages and disadvantages

1. SPI

SPI is a four wire serial bus interface with master/slave structure. The four wires are serial clock (SCLK), master out slave in (MoSi), master in slave out (MISO) and slave select (SS) signals respectively. The master device is the clock provider, which can initiate the operation of read slave device or write slave device. At this time, the master device will talk with a slave device. When there are multiple slave devices on the bus, to initiate a transmission, the master device will lower the selection line of the slave device, and then start data transmission or reception through MoSi and miso lines respectively

spi clock speed is very fast, ranging from a few megahertz to tens of megahertz, and there is no system overhead. The disadvantage of SPI in system management is the lack of flow control mechanism. Neither the master nor the slave device confirms the message, and the master device cannot know whether the slave device is busy. Therefore, smart software mechanisms must be designed to deal with validation issues. At the same time, SPI has no multi master device protocol, so it must adopt very complex software and external logic to realize the multi master device architecture. Each slave requires a separate slave selection signal. The total number of signals is finally n+3, where n is the number of slave devices on the bus. Therefore, the number of wires will increase in proportion to the number of slave devices. Similarly, it is inconvenient to add new slaves to SPI bus. For each additional slave device added, a new slave device selection line or decoding logic is required. Figure 2 shows a typical SPI read/write cycle. The address or command byte is followed by a read/write bit. If the data passes through MOS, then try to change the machine condition. I signal is written into the slave device and read out from the device through miso signal. Figure 3 shows the system block diagram of I2C bus/smbus and SPI

figure 2:spi typical read/write cycle

figure 3: (a) I2C bus/smbus system interface; (b) SPI system interface

2 I2C bus

i2c is a two-wire serial bus interface, which works in master/slave mode. The two-wire communication signals are open drain SCL and SDA serial clock and serial data respectively. The main device is clock source. Data transmission is bidirectional, and its direction depends on the state of read/write bits. Each slave device has a unique 7 or 10 bit address. The main device initiates a transmission through a start bit and terminates a transmission through a stop bit. The start bit is followed by the unique slave address, followed by the read/write bit

i2c bus speed is from 0Hz to 3.4MHz. It is not as fast as SPI, but it is ideal for system management devices such as temperature sensors. I2C has system overhead, including start/stop bits, acknowledgement bits and slave address bits, but it therefore has a flow control mechanism. The master device always sends an acknowledgement bit when it finishes receiving data from the slave device, unless it is ready to terminate the transmission. The slave device always sends an acknowledgement bit when it receives a command or data from the master device. When the slave is not ready, it can hold or extend the clock until it is ready to respond again

i2c allows multiple master devices to work on the same bus. Multiple master devices can easily synchronize their clocks, so all master devices use the same clock for transmission. Multiple master devices can detect which master device is using the bus through data arbitration, so as to avoid data destruction. Since the I2C bus has only two wires, the new slave device only needs to be connected to the bus without additional logic. Figure 4 shows a typical I2C bus read/write operation

Figure 4: typical read/write operations of I2C bus/smbus

3 SMBus

SMBus is a two-wire serial bus. The first version of the specification began to be commercially available in 1996. It is mostly based on I2C bus specification. Like I2C, SMBus does not need to add additional pins. The main purpose of creating this bus is to add new functional features, but it only works at 100kHz and is dedicated to intelligent battery management applications. It works in master/slave mode: the master device provides a clock, a start bit when it initiates a transmission, and a stop bit when it terminates a transmission; The slave has a unique 7 or 10 bit slave address

there are some differences in timing characteristics between SMBus and I2C bus. First of all, SMBus needs a certain data retention time, while I2C bus extends the data retention time internally. SMBus has timeout function, so when SCL is too low and exceeds 35 ms, the slave device will reset the ongoing communication. Instead, I2C uses hardware reset. SMBus has an alarm response address (ARA), so when an interrupt is generated by the slave device, it will not clear the interrupt immediately, but will remain until it receives an ara containing its address sent by the master device. SMBus only works from 10kHz to 100kHz. The minimum operating frequency of 10kHz is determined by the SMBus timeout function. (end)

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